Accelerate Workload Development with Open FPGA Stack Framework

Accelerate Workload Development with Open FPGA Stack Framework

Table of Contents

1. Introduction
2. What is the Open FPG Stack (OFS) Framework?
3. Benefits of Using OFS for FPGA Workload Design
4. Getting Started with OFS for Workload Development
5. Overview of FPGA Development Flow
6. Traditional FPGA Development Challenges
7. How OFS Reduces Development Time
8. Understanding OFS Architecture for Workload Development
9. Leveraging OFS Reference Designs
10. Developing Workloads with OFS
11. Features and Tools for Workload Development with OFS

🚀 What is the Open FPG Stack (OFS) Framework?

The Open FPG Stack, also known as OFS, is a software and hardware infrastructure that is developed by Intel to simplify the process of developing custom FPGA-based platforms or workloads. It provides a comprehensive set of tools, reference designs, and build scripts to enable developers and engineers to leverage Intel's design boards effectively.

🔥 Benefits of Using OFS for FPGA Workload Design

By using OFS as a starting point for FPGA workload design, developers and engineers can enjoy several benefits. Firstly, FPGA devices provide the flexibility to program and execute multiple tasks or instructions simultaneously, allowing for efficient task execution. Additionally, FPGA designs can be easily reprogrammed to accommodate customer changes and migrated to newer FPGA devices, offering easy design migration.

🚀 Getting Started with OFS for Workload Development

To get started with OFS for workload development, developers need to understand the traditional FPGA development flow. This flow involves both hardware and software aspects, including defining design requirements, hardware and software development, compilation, and verification. OFS simplifies this process by providing an optimized reference design and a full software stack, reducing development time significantly.

🔥 Overview of FPGA Development Flow

FPGA development typically involves both hardware and software aspects. After defining design requirements, developers spend a significant amount of time on hardware and software development. This includes stitching together the initial design, iterating through compilation and verification processes, and optimizing routing timing and performance. On the software side, developers may need to develop new drivers, patch drivers, and manage software stack aspects such as virtualization and orchestration.

🚀 Traditional FPGA Development Challenges

Traditional FPGA development can be time-consuming and complex. It often requires months of design cycles, involving both hardware and software development. This lengthy process can delay time-to-market and hinder rapid workload development. Developers must carefully manage hardware and software iterations while ensuring optimal design functionality and performance. These challenges make FPGA development a daunting task for many engineers and developers.

🔥 How OFS Reduces Development Time

OFS addresses the challenges of traditional FPGA development by providing a Timely closed, optimized reference design and a full software stack that considerably reduces time-to-market. By leveraging OFS, developers can benefit from a pre-defined architecture, industry-standard interfaces, and modular source code available through GitHub. This significantly streamlines the process of building specific solutions for FPGA workload development.

🚀 Understanding OFS Architecture for Workload Development

OFS architecture consists of two main regions: the FAM (Framework Adaptation Module) and the AFU (Accelerator Function Unit). The FAM provides an integrated, timely closed I/O ring with common interfaces such as PCIe, Ethernet, memory, debug, and QSFP controller. The AFU region offers inputs and outputs for developers to build their workloads, which can be ported across other OFS shell designs, enabling reusability.

🔥 Leveraging OFS Reference Designs

OFS provides reference designs and automated build scripts for building FPGA platforms. These reference designs include Upstream Linux drivers for native OS support, user-space tools, and a software development kit for further customization. With OFS, developers have access to open-source, modular source code and technical documents on GitHub, making it easier to build specific solutions for their applications.

🚀 Developing Workloads with OFS

Developing FPGA workloads with OFS requires following a six-step process. Firstly, developers need to set up their card or server with the necessary ingredients and compatible OS and kernel. Then, they can build their AFU using the OFS framework or leverage a pre-built design. After building the AFU, developers can test its basic functionality using the AFU simulation environment. In case of any issues, system testing can be performed using the remote signal tap feature.

🔥 Features and Tools for Workload Development with OFS

OFS offers several features and tools to facilitate workload development. Automated build scripts simplify the compilation process, and workload examples showcase the features of the FAM and software stack. Simulation support tools using Synopsis VCS and Questa simulators, as well as the OFS opaque software development kit, enable hardware and software co-simulation. The remote signal tap capability allows developers to capture and display signals inside the FPGA for debugging purposes.

FAQ

Q: How does OFS benefit FPGA workload development?

A: OFS reduces development time by providing optimized reference designs and a full software stack, streamlining the development process.

Q: Can workloads developed with OFS be ported to other OFS-enabled designs?

A: Yes, OFS enables workload portability across different OFS shell designs, allowing for reusability.

Q: What tools are included in OFS for workload development?

A: OFS offers automated build scripts, workload examples, simulation support tools, and the OFS opaque software development kit for hardware and software co-simulation.

Q: Where can I find FPGA acceleration development platforms compatible with OFS?

A: You can access compatible FPGA acceleration development platforms through Intel's board catalog or affiliated board vendor cards.

Q: How can I evaluate OFS before starting my own workload development?

A: OFS provides an out-of-box evaluation flow, including software and hardware ingredients, to test its capabilities and features before proceeding with custom workload development.

Resources:

• Intel Board Catalog